Accelerating a 2-D image convolution operation on FPGA Hardware
This article demonstrates a functional system on a PYNQ-Z2 FPGA development board that accelerates a 2-D convolution operation by impelemnting it in programmable logic.
Verilog18 posts
The Complete Guide to Preparing for a High-Frequency Trading FPGA Developer Interview
The articles talks about everything you need to know about getting that dream job as an FPGA designer at a HFT firm.
PCB design in altium
A quick reference to the different elements of PCB designing in altimum designer
Instructions for accessing chiprentals PYNQ-Z2 hardware
This page has all the information, instructions and demos related to accessing the Pynq-Z2 FPGA development board.
Introducing Chiprentals, an FPGA renting platform
With chiprentals, students and developers of digital design can get access to FPGA Development boards over the internet along with a fully set up host system to program and play around.
The Best Interview Question on Clock Domain Crossing
In this article I have documented a conversation I had during an interview where I had to apply all my knowledge of CDC in one go.
Preparing for an RTL Design Interview: An Exhaustive List of Topics
This is the only resource you need to refer to in order to feel confident about your next RTL design interview.
Convergence and Divergence in CDC and why it’s a problem
This article talks about the issue of convergnece and divergence in designs with multiple clock domain crossings.
Clock domain crossing (CDC) - The complete reference guide
This tutorial is a one stop solution for everything you will ever need to learn about clock domain crossing. The best resources from across the internet have been curated here
Engineering Masterclass: Resources that teach you more than college - Digital Design and Embedded systems
This series of articles consists of discussion about resources that can teach you way more than your college lectures and give you practical skills that are actually employable.
A gentle introduction to digital logic design for software developers via HLS
This article tries to demystify the field of digital logic design for those unacquainted with its complexities and differences in the though process when compared to the traditional world of programming.
A gentle introduction to CocoTb
In this tutorial, we look at cocotb, an upcoming popular verification framework that let's you control signals directly from python!
Creating automated testbenches for your digital designs using python and iverilog
In this article, we look at a quick way to automate your testbenches and find bugs in your code.
Putting it all together: The CNN accelerator
In this article, we put all the modules that we've designed in this series together and build a single unit of a CNN architecture.
How to reset your FPGA design at start up without using an external pin or button
An article showing beginners how they can generate a global reset signal at the initialization of the design without having to sacrifice a GPIO pin or a user button for the same
Architecture Outline : Machine Learning Accelerator
There has been a lot of interest in the tech community lately to accelerate data intensive artificial intelligence inference operations. This series of articles goes into a great detail in implementing an FPGA based AI accelerator in Verilog HDL.
The convolution Engine
In this article, we design a fully parameterized 2D convolution engine in Verilog HDL and verify its functionality with a golden model written in python.
How to write a parameterized universal shift register in verilog
A Shift registers is a very common design element in any digital design. This will be the only shift register you will ever need to write. The parameters in this code can be modified to create a shift register of any size and bit-width.