Putting it all together: The CNN accelerator
In this article, we put all the modules that we've designed in this series together and build a single unit of a CNN architecture.
Xilinx3 posts
The convolution Engine
In this article, we design a fully parameterized 2D convolution engine in Verilog HDL and verify its functionality with a golden model written in python.
How to write a parameterized universal shift register in verilog
A Shift registers is a very common design element in any digital design. This will be the only shift register you will ever need to write. The parameters in this code can be modified to create a shift register of any size and bit-width.