Convergence and Divergence in CDC and why it’s a problem

Convergence and divergence is a functional issue

Structurally, you might have ensured that the possibility of metastability has been reduced to infinitesimal degree, but in a large design with CDC happening at multiple points, it is easy to lose track of how the data is flowing and interacting.

CDC checking tools report Convergence when two independent signals that went through CDC start interacting at some point in the design. The potential issue here is that these two signals might take a different amount of time through their synchronisers and hence may not really be in ‘sync’ when they arrive at the logic where they are interacting.



Similarly, Divergence is reported when in the source domain, a particular signal splits into two or more paths and then multiple of these paths go through CDC separately. Again, they may take different amount of time through the synchroniser and hence might not be in ‘sync’ with they original signal that created them.


Another slightly different variant of the same problem is when data from two different source clock domains converges into the same destination domain or vice versa for divergence.


Fundamentally, this is the issue of Data Incoherence happening at a larger scale.

Either of these situations may or may not be a problem depending on what these signals are and how the design is using them. The designer at some points needs to take this big picture view and try to find such pitfalls.

Quiz Yourself: Same enable signal qualifying to independent data crossings. Does this count as a convergence issue? conv_5

Some Examples where convergence might not be a problem:

  1. Functionally, it does not matter if the individual paths have different delays through the synchronisers. a. Mutual Exclusivity between the converging/diverging signals. i.e it is ensured by design that only one of the signals changes at a time.

This is also the case when the convergence happens on a Mux. By definition of the mux it is clear that only one of these signals will be propagated forward hence there is no issue.

b. Multiple error scenarios generating a combined interrupt to the processor. We don’t really care which signal goes first or how many of them are high at once. c. All of the signals in question are ‘Quasi-Static’ i.e they change very sparsely. Eg: Configuration signals that are usually modified once in a while during entire operation.


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